The Hardware Implementation of Multi-channel Parallel Output in Video Decoder

Video Decoder with Reduced Storage Demands

减少存储量的视频解码器研究

Research and Implementation of the Video Decoder Based on Dual-Core DSPs

基于双核DSP的视频解码芯片驱动研究与实现

Reference Frame Compression Algorithm and Hardware Design for Video Decoder

解码器中的参考帧压缩算法及其硬件设计

Realization and Optimization of MPEG-4 Video Decoder based on SOC

面向嵌入式系统的MPEG-4解码加速器的设计和优化

Study and Realization of system controls in the HDTV video decoder

HDTV视频解码器中系统控制的分析与实现

The design and implementation of an FPGA-based digital HDTV video decoder

基于FPGA的数字高清晰度电视视频解码器的设计和实现

The hardware of image processing system is composed by video decoder, DSP, CPLD, etc.

硬件上构建了以视频解码芯片、DSP芯片和CPLD器件为核心的实时图像处理硬件平台；

Design and Implementation of Intra Prediction and Loop Filter in AVS Video Decoder

AVS解码器帧内预测和环路滤波器硬件设计与实现

A digital video decoder with high precision without using a phase locked loop

一种无锁相环的高精度数字视频彩色解码方案的研究

For complex system like MPEG-4 video decoder, the key problem is how to design its system architecture.

对于设计像MPEG4视频解码器这样复杂的系统，关键在于系统结构的设计。

A Co-design method for high-speed video decoder is present in this dissertation.

本文提出了一种高速视频解码器的软硬件协同设计方法。

Optimization of MPEG-4 video decoder based on ARM7

基于ARM7的MPEG-4视频解码器的优化

An Investigation of I~ 2C Serial Communication in the Video Decoder

视频解码芯片中I~2C串行通信的研究

Then we accomplish hardware design and simulation for prediction module of video decoder by ASIC design way.

最后本文依照ASIC芯片设计方法对视频解码芯片预测模块进行硬件设计和仿真。

Study and implementation of video decoder algorithm based on LAN

基于局域网的视频解码算法的研究与实现

This paper studies the parallel architecture of high-speed video decoder by the force of parallel processing technic.

本文着重从并行处理技术为切入点对高速视频解码器并行结构的设计方法进行了深入的研究。

Research on High Speed Video Decoder Design

高速视频解码器设计研究

Hardware Implementation of Deblocking Loop Filter in Video Decoder Chip

视频解码芯片中去块效应环路滤波的硬件实现

Research of the Methods for Decoding Bit Stream in Video Decoder System

视频解码系统中对输入码流进行译码的方法的研究

Implementation of bit-rate buffering in HDTV video decoder

HDTV视频解码器中码率缓冲的实现方法