When a CPU wishes to send an interrupt to another CPU, it stores the interrupt vector and the identifier of the target's local APIC in the Interrupt Command Register ( ICR) of its own local APIC.

  • 当某个CPU希望发送一个中断给另一个中断时,它保存中断向量并在它自己的局部APIC的ICR(中断命令寄存器)中标识目标的局部APIC。

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