All terms used in this Addendum have the same meaning as in the Prospectus.

The part brachiopod genera and species are described as addendum in this paper.

文中补遗描述部分腕足类属种.

Any addendum to be agreed in future to be as integral parts of this contract.

以后的附件将作为本合同的整体部份.

An addendum about the elderly and driving, compliments of my mother.

有关老年人开车的补充满足我母亲的赞美.

Proposed Addendum to: Standardization Mark ( SM ) of quality and Import Standardization Mark ( ISM ), Directives 2009.

修订提案: 质量标准标志 ( SM ) 和进口标准标志 ( ISM ), 指令2009.

And also a vocabulary list of Shuitian attached in addendum 1.

同时在附录一中补充列举了水田话词汇表.

The quantum theory is not just an esoteric addendum.

量子理论并不只是一个深奥的附录.

This is an addendum to the book.

这是本书的附录

An adder attacked my father.

一条小毒蛇攻击了我父亲.

Switched capacitor ( SC ) unit delayed, positive negative proportions and adder were designed using two phase clocks.

用二相时钟设计了对寄生电容低灵敏的开关电容单位延时器 、 正负比例器和加法器.

NIV He will suck the poison of serpents; the fangs of an adder will kill him.

16[和合]他必吸饮虺蛇的毒气, 14蝮蛇的舌头也必杀他.

Results show that the novel structure can realize the logic function of an adder successfully.

结果显示,这种新的全加器能正确完成加法器的逻辑功能.

Load the data to accumulator or adder according to the instruction.

将在存贮器数据寄存器的数据,根据指令载入加法器或累加器.

The adder is also the only British snake with a poisonous bite.

蝰蛇在英国也是唯一一种有毒的蛇.

A fast 64 bit binary parallel adder for high performance microprocessors and DSP processors is presented.

介绍了一个用于高性能的微处理器和DSP处理器的快速64位二进制并行加法器.

He will suck the poison of serpents ; the fangs of an adder will kill him.

16他必吸饮虺蛇的毒气.蝮蛇的舌头也必杀他.

Aging factors on the role of the lives of repeated or supply process called " Adder. "

加龄因素对生命的不断重复作用或供应过程,叫作 “ 加法 ”.

Many say this, but I'm looking a longterm adder as well.

许多人这样说, 但我一看,以及长期加法器.

Switched capacitor ( SC ) unit delayer , positive negative proportors and adder were designed using two phase clocks.

用二相时钟设计了对寄生电容低灵敏的开关电容单位延时器 、 负比例器和加法器.

The circuits of 16 bit adder and 8 bit multiplier are successfully evolved.

采用生长进化方法成功地进化出了16位加法器和8位乘法器.

This process requires that the adder used in multibit addition handle three inputs.

这就要求用于多位数相加的加法器具有三个输入端.